Portrait of Brent Lee
EECS @ UC Berkeley · Class of 2028

Hi, I'm Brent.

I work on digital design and silicon: RTL design, verification, and computer architecture, plus the boards that carry it.

01 / About

About me

I'm an EECS student at UC Berkeley, class of 2028, focused on digital design and silicon. I'm most interested in SoCs and front-end work: RTL design, verification, and computer architecture.

Most recently I designed a pipelined RISC-V processor in Berkeley's ASIC lab and took it from SystemVerilog to a routed Skywater 130nm layout. It was an Apple Design Project finalist. I also lead a team designing the battery management control board for CalSol, Berkeley's solar car team.

I interned with Boeing's Electromagnetic Effects team, where I ran transient pin injection testing for component qualification and built a Python tool that uses LLMs to generate certification reports from ground test procedures. Before that, at The Aerospace Corporation, I assembled and tested an RF front end for a satellite receiver and built a software-defined radio protocol stack with packet framing and error correction.

Studying
B.S. Electrical Engineering & Computer Sciences, UC Berkeley
Graduating
May 2028
Focus
RTL design, verification, computer architecture
Currently
EME Qualification Intern at Boeing
Electrical Project Lead at CalSol
02 / Experience

Where I've worked

  1. Electromagnetic Effects Qualification Intern

    May 2026 – Present

    The Boeing Company · Commercial Airplanes · Everett, WA

    • Built a Python app that uses LLMs to generate certification reports from ground test procedures, cutting report turnaround from months to weeks.
    • Ran transient pin injection testing for component-level qualification and supported aircraft ground tests.
    • Evaluated supplier qualification packages against hardware and software compliance requirements.
  2. Electrical Team Project Lead

    Aug 2025 – Present

    Berkeley Solar Car (CalSol)

    • Leading a 3-person team on the Gen 11 car's battery management system; designed its 4-layer KiCad controller board around the team's ESP32-S3 module.
    • Built four isoSPI ports to the battery module boards from LTC6820 transceivers and pulse transformers, with isolation moats and a 120 Ω differential impedance target coordinated with our sponsor fab.
    • Designed contactor switching, eight-fan PWM thermal management, and an OLED, LED, and buzzer status interface.
    • Now leading the schematic revision: 12 V / 24 V CAN input, a gate driver for the contactor FETs, and an RS485 link so the pack current sensor reports straight to the BMS.
  3. Wireless & Navigation / Digital Communications Intern

    May 2025 – Aug 2025

    The Aerospace Corporation · El Segundo, CA

    • Assembled and tested an RF front end for a satellite receiver, improving interference rejection by 40 dB+.
    • Built an SDR protocol stack with 2FSK modulation, preamble sync, forward error correction, and CRC validation.
    • Ported the transmitter signal processing from Python to C++ with Intel Performance Primitives to raise throughput.
  4. Avionics Deputy

    Aug 2024 – May 2026

    Space Technologies and Rocketry (STAR) at Berkeley

    • Designed and assembled an ESP32-S3 avionics board in Altium for in-flight sensing and telemetry.
    • Designed a LiFePO4 / solar / USB PD payload power system for 24+ hours of data collection after landing.
  5. Software Development Intern

    Jun 2023 – Jul 2023

    Parsec Automation Corp. · Yorba Linda, CA

    • Prototyped client and R&D solutions for the TrakSYS web app using C#, JavaScript, and Azure APIs.
    • Integrated Azure Optical Character Recognition (OCR) to reduce client data entry errors.
    • Assessed Azure AI (GPT-3.5) with a SQL database to improve database search and access.
03 / Projects

Portfolio

Silicon, circuit boards, and a few software experiments. Swipe or use the arrows to browse each gallery, and tap an image to enlarge it.

Apple Design Project Finalist

RISC-V Processor ASIC

EECS 151 ASIC Lab · Spring 2026

With a partner, I built a 3-stage pipelined RV32I processor in SystemVerilog: fetch, a combined decode/execute stage, and a combined memory/writeback stage, with register-file bypassing and writeback-to-execute forwarding. The write-back, write-allocate caches are built from Skywater 130nm SRAM macros. We took the design through the full RTL-to-GDS flow (VCS, Design Compiler, and Innovus via Hammer), closed setup and hold timing after place-and-route, and ran the full test suite against the routed netlist.

I owned the optimization against the competition's energy × area figure of merit, trying 3-, 4-, and 5-stage pipelines, a branch predictor, set-associative and direct-mapped caches at several sizes, and different SRAM placements. The 5-stage pipeline gained about 10 MHz but lost more than that in extra cycles. The 64-entry branch predictor nearly doubled core power for only a small drop in cycle count, so I cut it. Small 1 kB direct-mapped caches beat both the larger caches and the set-associative ones. Clock-gating the datapath and caches and relaxing the clock to about 24 MHz brought the core to 3.8 mW in 0.86 mm², which took the figure of merit from about 10 to 42.2 and made the design an Apple Design Project finalist.

  • SystemVerilog
  • RV32I
  • Caches
  • Synopsys VCS
  • Design Compiler
  • Cadence Innovus
  • Hammer
  • Sky130

Solar Car Battery Management System

Berkeley Solar Car (CalSol) · Electrical Project Lead

I lead the battery management system for CalSol's Gen 11 solar car and designed its controller board, a 4-layer PCB in KiCad that carries the team's ESP32-S3 dev module. Four LTC6820 transceivers and two HX1188 pulse transformers give it four isoSPI ports to the battery module boards, with the cable side of each transformer isolated by a moat cut through every copper layer. The isoSPI pairs are the board's only controlled-impedance nets, and I coordinated their 120 Ω differential impedance target with our sponsor fab, Bay Area Circuits. The board also switches the pack contactors, runs eight PWM cooling fans from two ADT7470 controllers on a fused supply, reads the low-voltage power board's source status, and drives an OLED display, four amber error LEDs, and a buzzer.

The first layout is done, and I'm now leading the schematic revision before we re-lay out and order. It adds a TPS7E8101 LDO so the board runs on either 12 V or 24 V CAN, drives the contactor FETs from a UCC27624 gate driver instead of a 3.3 V GPIO, and adds an RS485 transceiver so the pack current sensor reports straight to the BMS. Our previous car's BMS faulted whenever CAN went down because it lost its current reading. Bring-up and firmware integration come next.

  • KiCad
  • 4-layer PCB
  • isoSPI
  • ESP32-S3
  • Controlled impedance
  • Power & gate drive

Starflower Avionics Board

Space Technologies and Rocketry (STAR) at Berkeley

Avionics board built for the STAR onboarding project for our rocket Starflower (last photo). The board uses an ESP32-S3-WROOM-1-N8 and features a working barometer and IMU. Code for interfacing with flash memory is W.I.P. Telemetry recording on ESP32 flash begins when IMU detects sufficient acceleration (takeoff!).

  • Altium Designer
  • ESP32-S3
  • IMU
  • Barometer
  • C / Arduino

STM32 Mechanical Keyboard

Personal project · In progress

I am currently working on building an STM32-based mechanical keyboard. The final version will have an I2C mini-OLED screen, pair of digital encoder knobs, and fully addressable RGB LED lighting. I eventually plan to have an aluminum case machined to house the PCB.

Instead of KiCad, I'm using Altium Designer for schematic and layout. I've had the proof-of-concept macro-pad manufactured and have finished hand-soldering (pictured), and have just started bringup.

  • Altium Designer
  • STM32
  • I²C OLED
  • Addressable RGB

Arduino Mechanical Keyboard

Personal project

For this project, I designed and built my own Arduino mechanical keyboard. Using KiCAD, I created the schematic and designed the PCB. After sending it in to be manufactured, I used a combination of LibreCAD and Fusion 360 to design a keyboard case.

  • KiCad
  • Arduino
  • Fusion 360
  • LibreCAD

AimLab Auto-Aim

Computer vision

Using computer vision to technically create an "aim-bot" for an aim training game. I used OpenCV and contours to detect targets. After compensating for a first-person-view, the mouse moves to and clicks on that target.

  • Python
  • OpenCV

TensorFlow Object Detection Assisted Annotation

Machine learning tooling

In the earlier stages of my Auto-Aim project, I planned to use object detection to locate targets. Although that proved inefficient, in the process, I wrote a program to help me annotate the training data. The program uses a partially trained model to write annotation boxes to an xml file.

  • Python
  • TensorFlow
04 / Skills

Toolbox

Digital Design & Silicon

  • SystemVerilog
  • RISC-V
  • Computer Architecture
  • Cache Design
  • Synopsys VCS
  • Design Compiler
  • Cadence Innovus
  • Hammer RTL-to-GDS
  • Verilator
  • Verdi

PCB & Embedded

  • KiCad
  • Altium Designer
  • Multi-layer PCB Layout
  • ESP32
  • STM32
  • Arduino
  • Oscilloscope & Spectrum Analyzer
  • RF & SDR
  • EME Qualification Testing

Software

  • Python
  • C
  • C++
  • Java
  • Linux
  • Git
  • Jupyter
  • OpenCV
  • PyTorch
  • LLM Automation
  • Cybersecurity

Mechanical & Simulation

  • SolidWorks
  • Fusion 360
  • OpenRocket
05 / Contact

Let's talk.

I'd love to discuss potential internship opportunities, especially in RTL design, verification, and computer architecture.